Use VHDL to develop FPGA applications that run on development boards


What you'll learn
Understand the VHDL design and development process
Learn how to implement designs using VHDL development tools
Become familiar with the various FPGA development tools available
Complete projects from conception to full implementation

Requirements
Basic knowledge of digital electronics such as logic gates
No VHDL experience required, this will be covered in the course
Desire to learn about VHDL and/or FPGA's

Description
Learn the Essentials of VHDL and FPGA Development is course that will teach you the fundamentals and basics of VHDL design. Prior to working through the courses you will go through the VHDL design structure section that will explain the various concepts and terms needed to implement the projects in VHDL. In this course you will be working through various projects that will require you to go through the entire FPGA development process. You will be guided through the coding of the actual VHDL to the synthesis using either Xilinx's development tool, Vivado or Altera/Intel's development tool Quartus. The projects in this course:Shift Register DesignA project that takes you through the design and simulation steps to fully test and implement a shift register.Buttons & LEDsA project that is designed to teach students the very basics of VHDL as well as how to make specific pins on an FPGA inputs (buttons) and outputs (LEDs).All of the required background and knowledge to complete each project will be explained prior to completing the projects above. There are demonstration videos and walkthroughs for each project so that you can have a deep understanding of how the project works. Walkthroughs of the completed projects are also included to further your understanding of how these designs are implemented.

Overview
Section 1: Introduction
Lecture 1 Welcome to the Course
Lecture 2 VHDL Introduction
Lecture 3 Creating a Project in Vivado
Lecture 4 Creating a Project in Quartus
Section 2: VHDL Design and Data Types
Lecture 5 VHDL Keywords
Lecture 6 VHDL Libraries
Lecture 7 VHDL Entities & Architecture
Lecture 8 VHDL Generics
Lecture 9 VHDL Data Types
Lecture 10 Integers in VHDL
Lecture 11 When-Else Statements
Lecture 12 Concurrent vs Sequential Statements
Section 3: VHDL Simulation
Lecture 13 Introduction to Simulation
Lecture 14 Shift Register Design
Lecture 15 Shift Register Test Bench Design
Lecture 16 Shift Register TCL Script Design
Lecture 17 Vivado Simulator Tool Introduction
Lecture 18 Running a Simulation in Vivado
Lecture 19 Navigating Vivado Simulations
Section 4: Buttons & LED Project
Lecture 20 Introduction & Deliverables
Lecture 21 Buttons & LEDs Complete Design Walkthrough
Lecture 22 Arty A7 IO Placement
Lecture 23 Generate a Xilinx Programming File
Lecture 24 Programming the Arty A7 Development Board
Lecture 25 Arty A7 Demonstration
Lecture 26 DE10 Nano IO Placement
Lecture 27 Generate Intel Programming File
Lecture 28 Programming the DE10 Nano Development Board
Lecture 29 DE10 Nano Demonstration
Section 5: Conclusion
Lecture 30 Conclusion
Makers and hobbyists who want to learn how to use FPGA's,Anyone interested in learning how to create VHDL designs,Engineers who want to learn or build upon their FPGA development skills

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